TESTMESH
MILLIONS OF CYCLES in a Flash
NplusT’s TESTMESH is the new engineering tester platform, based on a breakthrough architecture concept. The members of the TESTMESH family represent high-performance, ready-to-start, all-in-one instruments for the development and engineering of novel non-volatile memory technologies.
Based on the technology development stage, TESTMESH offers several optimized configurations.
The hardware and software resources of the TESTMESH instruments support:
- Extremely fast algorithmic cycling
- Increased visibility on the cell and array status, characteristics and behavior
- Productivity of the technology and product engineers.
These features are obtained by:
- Algorithmic, 200MHz waveform generators with dynamic impedance control and with pulse selection in microseconds
- Fast current sensing circuits with setup time below microsecond and sampling speed in the dozens of nanosecond domain
- Current measurement range switch time in microseconds, essential to obtain write pulses and suitable read scales
- Threshold-programmable one-bit ADC to detect if the cell reached the desired state (sense amplifier emulation)
- Flexible, programmable hardware sequencer to reduce the interaction with the software
- Wafer and package level testing
- Graphical user interface with engineering and operator modes, editor for waveforms, cycles and flows
- Python and C++ programmability
- Seamless integration with BarnieMAT, array data analysis software
TESTMESH Configurations
Customer testimonials
40-times faster test execution than on a high cost ATE
3-times higher engineering productivity related to another memory tester
Allows engineers to focus on “what-to-do” rather than “what-we-see”
TESTMESH OverView
Applications:
- Technology evaluation
- Reliability evaluation
- Design validation
- Characterization
- Die sorting for engineering purposes
- Failure analysis
- Production monitor
Primary Functions:
- Algorithmic and blind cycling
- Characterization (IV, …) at programmable cycles
- Topologic pattern generation
- Various disturb operations (read, topologic. …)
Technologies:
- Flash (NAND, NOR, 3D)
- ReRAM
- PCM
- FeRAM
- MRAM
- Memristor networks
- …
TMA-100
For NVM cells and mini-arrays
One Instrument for Every Memory Technology
- Characterization on wafer and on package
- For single-cell devices, test arrays, products
- On transistor and resistor-based cells
- Emulates charge pumps, sense amps, digital logic
Speed-Optimized Architecture
- Hardware support for, fast algorithmic cycling
- 1-bit ADC for fast decision
- Waveform and range switch in microseconds
- Sequencer for array address generation
Ready-to-Go Solution
- Analog and digital signal generation and capture
- Built-in switch matrix for resource routing
- External SMU integration option
- Configurable test flows
TMC-100
For evaluation of crossbar and
computational arrays
All-in-One Instrument
- Analog signal generation and capture
- Dedicated multiplexers and references
- Built-in characterization flows
Speed and Accuracy
- Hardware support for fast, algorithmic cycling
- High precision signals and measurements
- Setup in microseconds
Focus on Engineering Productivity
- True Interactive Testing
- Python and C++ programming
- Integrated data analysis
TMY-100
Protocol-based Testing
- Parallel and serial interfaces
- Customizable protocols via firmware and software
- Device-specific algorithms
High Visibility on the Cells
- Cell current and margin measurements
- Threshold voltage measurements
- Analog and digital bitmapping
Fastest Design Validation and Failure Analysis
- True Interactive Testing
- Python and C++ programming with debug support
- Integrated array analysis software
TMS-100
Affordable instrument for every technology
- Integrates analog signal generation and capture
- Ready-to-use connections to probe card
- Built-in parametrizable characterization flows
Speed-Optimized Architecture
- Hardware support for fast, algorithmic cycling
- 1-bit ADC for fast decision
- Waveform and range switch in microseconds
Focus on Engineering Productivity
- True Interactive Testing
- Python and C++ programming
- Integrated data analysis
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